Solid-state imaging devices feature semiconductive pixels which collect minority carriers in response to photons absorbed by the pixels. The charges so generated are integrated by collecting them in a potential well. Charge transfer is achieved by transporting the collected charges by line and column shift registers into an output circuit, as is well known. Charge-coupled devices (hereinafter, "CCD's"), in turn, are a preferred form of solid-state imaging devices, and it is the making of these to which this invention is particularly directed. More specifically, CCD's feature MOS capacitors and preferably buried channels created by ion implantation. It is the method of ion implantation and of formation of the corresponding electrodes that governs whether or not the CCD imaging device will be highly efficient or not.
More specifically, in the field of two-phase charge-couple devices, it is essential that the devices be prepared in such a way as to obtain edge alignment between the potential well formed by an ion-implanted strip, and its overlying electrode. Failure to do so produces stray potential wells and barriers to efficient delivery of charges, and the performance of the device is degraded.
In U.S. Pat. No. 4,035,906, a process for forming CCD's is described wherein the mask used to ion-implant the first set of implanted strips is removed and is not available for the formation of the first set of polysilicon strips. Instead, the polysilicon strips are located by benchmarks not identified, so as to be staggered with respect to the implanted strips, FIGS. 2C and 2D. This requires that the portion of the implanted substrate covered by the polysilicon strips, be freed of its implanted ions by diffusing into the underlying substrate during the isolation oxidation step (occurring between FIGS. 2C and 2D). This is unsatisfactory as the inward diffusion is difficult to control. Some n-type dopant remains in the oxide, where it is not needed. A more serious drawback is that the dopant tends to excessively diffuse at the very edge of the underlying electrode, both downwardly and outwardly, as will be explained further hereinafter. This causes unwanted alteration of the potential well of both the first set of electrodes as well as of the second set that is formed adjacent thereto. The undesired potential alteration tends to produce charge transfer inefficiency.
It is difficult therefore, in such a technique to precisely control the out-diffusion. The difficulties are aggravated as the dimensions of the CCD decrease, a step necessitated by the overall reductions in integrated circuit dimensions. That is, a thinner isolation oxidation layer means a shorter oxidation time, and thus more sensitivity to stopping the out-diffusion exactly as needed.